本帖最后由 melfes 于 2013-1-9 15:24 编辑
啊，对了，其实翔尼也有印刷OLED的打算的，不过是小尺寸屏幕的，已经并入JDI了...
2012年的一条记录：
Sony believes its offset printing technology could enable 500ppi OLED panelsAt SID 2012 Sony presented a technical paper describing its offset printing technology which enables high resolution OLED panels. In fact Sony claims this technology could produce 500ppi OLED panels.
Sony's printing technology has three steps. In step 1, the ink is coated on a flat blanket by slit coating. In step 2, the stamp and the blanket are then placed in contact and subsequently separated. The ink in contact with the stamp detaches from the blanket, since the stamp has a higher surface energy than the blanket. The stamp has the reverse pattern. As a result, the desired print pattern remains on the blanket. In the final step, the TFT substrate and the blanket are aligned, placed in contact and finally separated. The print pattern is transferred from the blanket to the TFT substrate based on the same principle as that for the second process. Sony has developed a printing system based on this technology for a Gen-1 (300x350 mm) substrate, and already produced 3" VGA panels (270 ppi). If I understand it correctly, this isthe panel Sony unveiled last year on May 2011 at SID, shown above.
然后是翔尼的IGZO，2011年就有发表，看样子为Top Emission做了优化
2011年的一条记录：
Sony developed an OLED panel that uses self-aligned top-gate Oxide-TFT
Sony developed a new OLED panel that uses a self-aligned top-gate Oxide-TFT (IGZO). According to Sony, the image is improved over normal OLEDs as it reduces the unevenness in brightness (that is caused by parasitic capacitance between gate electrode and source/drain electrodes in the TFT). The new panel is 9.9" in size (960x540) and features 200cd/m2 brightness, 1M:1 contrast ratio and 96% NTSC color gamut.
Sony's new TFT uses a self-aligned top-gate structure (Sony's older TFT used a bottom-gate structure). This makes it possible to keep a long enough distance between the gate electrode and the source/drain electrode - which reduces parasitic capacitance. To make this new structure, Sony developed a new manufacturing process: - Patterning with a dry-etching method after forming oxide semiconductor IGZO, gate insulating film and gate electrodes on a glass substrate
- Forming an aluminum thin film on it with a sputtering method
- Forming an aluminum oxide (Al2O3) protective layer by oxidizing Al in an oxygen annealing process and a low-resistance layer by dispersing enzyme on the surface of the oxide semiconductor (this adds stability and high reliability to the annealing treatment)
- Forming source/drain electrodes by opening via holes after forming an organic layer in a coating process.
看来翔尼的野心不死啊... | 
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发表于 2013-1-9 15:02
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